High-frequency characteristics are very important for an RF (radio frequency) module or the like used in cellular phones. The High-frequency characteristics of such a module are most sensitively affected by wiring between terminals of a semiconductor (LSI) chip and external components. Conventional wiring is long; i.e., each wiring line extends through LSI chip bonding wire, a package substrate, and a post electrode to a terminal of a component. In the case of an RF module, although the amount of wiring within the module is large, it is sufficient for the module to have a small number of external connection terminals. Although a conventional typical module technique can form multilayer wiring on the side toward the substrate of a package so as to increase the amount of wiring, in general, the conventional technique encounters difficulty in forming a large amount of wiring on the post electrode side. Furthermore, conventionally formed signal paths are two-dimensional. When signal paths are formed three-dimensionally, the signal paths can be shortened, and high-frequency characteristics are improved. In addition, mounting area can be reduced, whereby total cost can be lowered. Therefore, there has been demand for shortening signal paths through employment of three-dimensional integration.
FIG. 21 is a view exemplifying a conventional, three-dimensionally integrated semiconductor device (see Patent Document 1). An upper face wiring pattern composed of electrodes A, unillustrated wiring traces, etc. is formed on the upper face of a wiring substrate. Circuit elements such as active elements and passive elements (e.g., capacitors, resistors, inductors, and filters) are mounted on the electrodes A. A lower face wiring pattern composed of electrodes B, wiring traces connecting them, etc. is formed on the lower face of the wiring substrate. This lower face wiring pattern is electrically connected to the electrodes A on the upper face of the wiring substrate via unillustrated wiring.
Bump electrodes of an LSI chip are connected to the electrodes B of the lower face wiring pattern. Vertical connection holes extend from other electrodes C, and a connection portion formed of a thin metal film is formed on the wall surface of each of the connection holes. The thin metal film that constitutes the connection portion is united with an electrode D, which is formed on the surface of a seal portion and surrounds the corresponding connection hole.
Such a double face mounting semiconductor is attached onto a mother substrate. A wiring pattern including electrodes E and a ground electrode is formed on the mother substrate. The electrodes E and the ground electrode are formed such that they face the electrodes D and a heat radiating member, respectively, and are joined thereto by use of solder or the like. Heat generated in an active region of the upper surface of the semiconductor chip is radiated from the lower surface of the semiconductor chip to the mother substrate via the heat radiating member and the ground electrode.
As a result of mounting an LSI chip and various circuit elements on opposite faces of a wiring substrate as described above, mounting area can be reduced, whereby total cost can be reduced. In addition, signal paths can be shortened.
However, the illustrated semiconductor device has a complicated structure, and requires a complicated process especially for a connection structure for establishing connection between the wiring patterns provided on the wiring substrate and the mother substrate, respectively. In general, a semiconductor manufacturing process is divided into a former stage for fabricating an LSI and a latter stage for packaging the LSI. There are a few manufacturers that specialize in the latter stage but can cover the former stage. Manufacture of the illustrated semiconductor device requires a process for performing formation of vertical connection holes to be connected to electrodes on the wiring substrate, charging of an electrically conductive substance, etc.; that is, requires facilities similar to those used in the former stage, and cannot be performed by use of only conventional facilities for the latter stage.